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FDD3570
February 2000 PRELIMINARY
FDD3570
80V N-Channel PowerTrench MOSFET
General Description
This N-Channel Logic level MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. This MOSFET features faster switching and lower gate change than other MOSFETs with comparable RDS(ON) specifications resulting in DC/DC power supply designs with higher overall efficiency.
Features
* 10 A, 80 V. RDS(ON) = 0.019 @ VGS = 10 V RDS(ON) = 0.022 @ VGS = 6 V.
* Fast switching speed. * High performance trench technology for extremely low RDS(ON) . * High power and current handling capability.
D
G S
TO-252
D
G
S
Absolute Maximum Ratings
Symbol
VDSS VGSS ID
TA=25 C unless otherwise noted
o
Parameter
Drain-Source Voltage Gate-Source Voltage Maximum Drain Current-Continuous Maximum Drain Current - Pulsed
(Note 1) (Note 1a)
Ratings
80 20 43 10 110
(Note 1) (Note 1a) (Note 1b)
Units
V V A
PD
Maximum Power Dissipation @TC = 25oC TA = 25 C TA = 25oC
o
69 3.4 1.3 -55 to +150
W
TJ, Tstg
Operating and Storage Junction Temperature Range
C
Thermal Characteristics
RJC RJA Thermal Resistance, Junction-to- Case Thermal Resistance, Junction-to- Ambient
(Note 1) (Note 1a) (Note 1b)
1.8 37 96
C/W C/W C/W
Package Marking and Ordering Information
Device Marking FDD3570 Device FDD3570 Reel Size 13'' Tape width 16mm Quantity 2500
2000 Fairchild Semiconductor Corporation
FDD3570 Rev BW)
FDD3570
Electrical Characteristics
Symbol Off Characteristics
BVDSS BVDSS TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse
(Note 2)
TA = 25C unless otherwise noted16
Parameter
Test Conditions
VGS = 0 V, ID = 250 A ID = 250 A,Referenced to 25C VDS = 64 V, VGS = 20 V, VGS = -20 V VGS = 0 V VDS = 0 V VDS = 0 V
Min
80
Typ
Max
Units
V
78 1 100 -100
mV/C A nA nA
On Characteristics
VGS(th) VGS(th) TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance
VDS = VGS, ID = 250 A ID = 250 A,Referenced to 25C VGS = 10 V, ID = 10 A VGS = 10 V, ID = 10 A,TJ =125C VGS = 6 V, ID = 9 A VGS = 10 V, VDS = 5 V VDS = 5 V, ID = 14 A
2
2.4 -7 0.015 0.027 0.016
4
V mV/C
0.019 0.038 0.022
ID(on) gFS
25 40
A S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
VDS = 40 V, f = 1.0 MHz
V GS = 0 V,
2800 230 117
pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = 40 V, VGS = 10 V,
ID = 1 A, RGEN = 6
20 12 60 24
32 24 95 38 76
ns ns ns ns nC nC nC
VDS = 40V, VGS = 10 V
ID = 9 A,
54 9.6 14
Drain-Source Diode Characteristics and Maximum Ratings
IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.8 A
(Note 2)
2.8 0.72 1.2
A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) RJA = 40/W when mounted on a 1in pad of 2 oz copper
2
b) RJA = 96/W when mounted on a minimum pad.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDD3570 Rev. A(W)
FDD3570
Typical Characteristics
50 5.0V 4.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V ID, DRAIN CURRENT (A) 40 6.0V
2 1.8 1.6 1.4 1.2 1 0.8 0 1 2 3 0 10 20 30 40 50 ID, DRAIN CURRENT (A)
VGS = 4.0V 4.5V 5.0V 6.0V 7.0V 10V
30 4.0V 20
10 3.5V 0 VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.04 RDS(ON), ON-RESISTANCE (OHM)
2 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) ID = 9A VGS = 10V
ID = 10 A
0.03
TA = 125oC
0.02 TA = 25oC
0.01
0 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
50 I S, REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 40
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100 VGS = 0V 10 1 0.1 0.01 0.001 0.0001 TA = 125 C 25 C -55 C
o o o
30
20 125 C
o
10
25 C TA = -55 C
o
o
0 2 3 4 5 6 VGS, GATE TO SOURCE VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDD3570 Rev. A(W)
FDD3570
Typical Characteristics
10 VGS, GATE-SOURCE VOLTAGE (V) ID = 9A 8 CAPACITANCE (pF) 40V 6 VDS = 10V 20V
4000 3500 3000 2500 2000 1500 1000 500 COSS CRSS 0 10 20 30 40 50 60 CISS f = 1MHz VGS = 0 V
4
2
0 0 10 20 30 40 50 60 Qg, GATE CHARGE (nC)
0
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
1000 RDS(ON) LIMIT 100s 1ms 10ms 100ms 1s 1 VGS = 10V SINGLE PULSE RJA = 96oC/W TA = 25oC 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) DC 10s P(pk), PEAK TRANSIENT POWER (W) 200
Figure 8. Capacitance Characteristics.
ID, DRAIN CURRENT (A)
100
150
SINGLE PULSE RJA = 96 C/W TA = 25C
10
100
50
0.1
0 0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIEN THERMAL RESISTANCE
1
D = 0.5 0.2
RJA(t) = r(t) + RJA RJA = 96 C/W P(pk) t1 t2
SINGLE PULSE 0.01
0.1
0.1 0.05 0.02
0.01
TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.1 t1, TIME (sec) 1 10 100 1000
0.001 0.0001
0.001
0.01
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
FDD3570 Rev. A(W)
TO-252 Tape and Reel Data and Package Dimensions
D-PAK (TO-252) Packaging Configuration: Figure 1.0
Packaging Description:
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
EL ECT ROST AT IC SEN SIT IVE DEVICES
TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
TO-252 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.
Static Dissipative Embossed Carrier Tape
F63TNR Label
D-PAK (TO-252) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel(kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 359x359x57 5,000 0.300 1.200
D-PAK (TO-252) Unit Orientation
359mm x 359mm x 57mm Standard Intermediate box ESD Label
F63TNR Label sample
F63TNR Label
LOT: CBVK741B019 FSID: FDD6680 QTY: 2500 SPEC:
D/C1: Z9942 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
(F63TNR)3
TO-252 (D-PAK) Tape Leader and Trailer Configuration: Figure 2.0
Carrier Tape Cover Tape
Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets
FZ9935 FDD 6680
FZ9935 FDD 6680
FZ9935 FDD 6680
FZ9935 FDD 6680
July 1999, Rev. A
TO-252 Tape and Reel Data and Package Dimensions
D-PAK (TO-252) Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type TO252 (24mm)
A0
6.90 +/-0.10
B0
10.50 +/-0.10
W
16.0 +/-0.3
D0
1.55 +/-0.05
D1
1.5 +/-0.10
E1
1.75 +/-0.10
E2
14.25 min
F
7.50 +/-0.10
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
2.65 +/-0.10
T
0.30 +/-0.05
Wc
13.0 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
10 deg maximum Typical component cavity center line
0.9mm maximum
B0 10 deg maximum component rotation
0.9mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
D-PAK (TO-252) Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
B Min Dim C
Dim A max
Dim N
Dim D min
DETAIL AA See detail AA W3
13" Diameter Option
W2 max Measured at Hub
Dimensions are in inches and millimeters
Tape Size
164mm
Reel Option
13" Dia
Dim A
13.00 330
Dim B
0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2
Dim N
4.00 100
Dim W1
0.646 +0.078/-0.000 16.4 +2/0
Dim W2
0.882 22.4
Dim W3 (LSL-USL)
0.626 - 0.764 15.9 - 19.4
July 1999, Rev. A
TO-252 Tape and Reel Data and Package Dimensions
TO-252 (FS PKG Code AA)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.300
September 1999, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM
DISCLAIMER
ISOPLANARTM MICROWIRETM POPTM PowerTrench QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8
SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. D

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